The design of complex computer hardware no longer begins with a circuit diagram. Instead, it begins with a software program that describes the behavior or functionality of a circuit. This software program is written in a hardware description language (HDL)(e.g. VHDL or Verilog) that defines an algorithm to be performed with limited implementation details. Designers direct behavioral synthesis tools to generate alternate architectures by modifying constraints (such as clock period, number and type of data path elements, and desired number of clock cycles). A simulation tool (e.g., Modelsim by Mentor Graphics) simulates the functionality of the system prior to generating a physical implementation of the circuit.
The HDL program is converted into a register transfer level (RTL) description. The RTL description is used to ultimately generate a netlist that includes a list of components in the circuit and the interconnections between the components. This netlist is used to create the physical integrated circuit.
Although describing a system design in HDL provides great flexibility to designers, it is desirable to provide a greater level of abstraction to describe the system functionality. For example, programming languages like C and C++ are now being used as a starting point to describe the function of a circuit. The description of the system in C or C++ is then used by synthesis tools to generate a HDL description of the circuit.
Unfortunately, certain aspects of the system's design cannot be described using conventional ANSI C and C++. For example, C and C++ cannot be used to describe hardware interfaces of the function, which are required to interact with the rest of the integrated circuit. Thus, a designer is forced to describe the functionality of a system design using C and then use HDL constructs to describe the interfaces. However, such a process is time consuming and costly.
Several attempts have been made to adapt conventional C and C++ to add the capability to describe interface components. For example, SystemC is an adaptation of C++ that adds the capability of describing interface elements. However, languages such as SystemC suffer from the same inefficiencies as other HDLs. For example, the programmer is forced to learn the specific language commands, which takes away the benefits of using a generic language such as C or C++.
Thus, there is a need for a tool that allows a designer to use a generic language, such as C or C++, but allows the designer to easily add hardware interfaces.